iSoC Lab - Members

Byeong-Gyu Nam received his B.S.degree (summa cum laude) in computer engineering from Kyungpook National University, Daegu, Korea,in 1999, M.S. and Ph.D.degrees in electrical engineering and computer science (EECS) from Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2001 and 2007, respectively. His Ph.D. work focused on low-power GPU design for wireless mobile devices. In 2001, he joined Electronics and Telecommunications Research Institute (ETRI), Daejeon, Korea, where he was involved in a network processor design for InfiniBand™ protocol. From 2007 to 2010, he was with Samsung Electronics, Giheung, Korea, where he worked on world first 1-GHz ARM Cortex™ microprocessor design.
Dr. Nam is currently with Chungnam National University (CNU), Daejeon, Korea, as a Professor His current interests include machine learning processor, graphics processor, microprocessor and low-power SoC design. He co-authored the book Mobile 3D Graphics SoC: From Algorithm to Chip (Wiley, 2010) and presented tutorials on mobile processor design at IEEE 1SSCC 2012 and IEEE A-SSCC 2011. He received the CNU Recognition of Excellent Professors in 2013 and the A-SSCC Distinguished Design Award in 2016. Prof. Nam has served as the Chair of Digital Architectures and Systems (DAS) subcommittee of 1SSCC from 2017 to 2019 and a member of Steering Committee of the IC Design Education Center (IDEC) from 2013 to 2018. He was a member of the TPC for IEEE ISSCC (2011-2019), IEEE A-SSCC (2011-2018), IEEE COOL Chips (2011-2018), VLSI-DAT (2011-2018), ASP-DAC (2015-2016), and ISOCC (2015-2018). He was a Guest Editor for the IEEE Journal of Solid-State Circuits (JSSC) in 2013 and is an Associate Editor of the IEIE Journal of Semiconductor Technology and Science (JSTS).

Education

• 3/2002 - 2/2007 Ph.D. in Electrical Engineering and Computer Science (EECS), KAIST
• 3/1999 - 2/2001 M.S . in Electrical Engineering and Computer Science (EECS), KAIST
• 3/1993 - 2/1999 B.S . in Computer Engineering, Kyungpook National University

Work Experiences

• 9/2010 - Present Professor, Chungnam National University, Daejeon, Korea
• 4/2007 - 8/2010 Senior Engineer, Samsung Electronics, Giheung, Korea
• 1/2001 - 2/2002 Engineer, ETRI, Daejeon, Korea

Tutorials & Invited Talks

[Trutorials]
Mobile GHz Processor Design Techniques, ISSCC 2012 Tutorial
High-Performance Mobile CPU and GPU Design, A-SSCC 2011 Tutorial

[Invited Talks]
• Deep learning and SoCs, IEIE SoC 설계 연구회 하계 워크샵, 2016.7
• Mobile Application Processors Trends, 정부대전청사, 2016. 4.
• Ultra-Low-power SRAM Design, 한국전자통신연구원 (ETRI), 2015.7
• Processors in ISSCC2015, ISSCC 2015 Review Workshop, IEEE SSCS Seoul Chapter, 2015.5
• SoC와 임베디드SW 협업을 통한 경쟁력 확보 전략, 임베디드SW & 웨어러블 컨퍼런스, 임베디드소프트웨어산업협회 (KESSIA), 2015.4
• Mobile Processor Design, 한국반도체학술대회(KCS), 2015.2
• 스마트기기 반응성 개선을 위한 GPU 스케줄러, 한국전자통신연구원 (ETRI), 2014.12
• SW-SoC 융합설계, 한국전자통신연구원 (ETRI) IT-SoC 센터, 2014.12
• 웨어러블 IoT 기기를 위한 SoC 설계기술 동향, IoT 및 Wearable 기술 워크샵, 한국전기전자학회, 2014.12
• Mobile AP 설계, KAIST IDEC, 2014.11
• IoT/웨어러블 SoC 및 IP 구현기술, IoT/Wearable 디바이스 기술 워크샵, 대한전자공학회, 2014.11
• 웨어러블 스마트기기를 위한 반도체기술 동향, IT 융합기술 워크샵, 대한전자공학회, 2014. 11
• Mobile AP Platform, 삼성전자 Memory 사업부, 2014.8
• 웨어러블 UI/UX를 위한 SW-SoC 융합 기술, 웨어러블 디바이스 IoT를 위한 융합기술과 산업연계방안 세미나, 미래기술교육연구원, 2014.8
• Digital Circuits & Mobile SoCs in ISSCC2014, ISSCC 2014 Review Workshop, IEEE SSCS Seoul Chapter 2014.5
• Low-power Mobile GPU Design, 한국정보과학회 컴퓨터시스템연구회 동계워크샵, 2014.2
• Embedded oS for Wearable Computers, 웨어러블컴퓨터의 현황과 전망 워크샵, KAIST 시스템설계응용연구센터, 2013.11
• Mobile Platform, 삼성전자 Memory 사업부, 2013.8
• Mobile Application Processor Design Techniques, 삼성전자 DMC 사업부, 2013.3
• Processor & Digital Circuits in ISSCC2013, ISSCC 2013 Review Workshop, IEEE SSCS Seoul Chapter, 2013.3
• Mobile GHz Processor Design, ISSCC 2012 Tutorial Replay, IEEE SSCs Seoul Chapter, 2012.12
• Mobile 3D Graphics SoC - GPU and Memory Perspective, 한국전자통신연구원 (ETRI), 2012.9
• Design Strategies for High-performance Application Processors, SK Telecom, 2012.7
• Smart Mobile System Design - Processor, Memory, and Interconnects, 삼성전자 Memory 사업부, 2012.6
• Mobile CPU and GPU Design Strategies for High-Performance Application Processors, SK Hynix, 2012.5
• Heterogeneous Multi-core Design for Mobile Application Processors, LG 전자, 2012.5
• Mobile GPU 설계, KAIST IDEC, 2012.5
• Mobile 3D Graphics SoC, 삼성전자 SystemLSI 사업부, 2012.4
• Mobile CPU and GPU Design Strategies for High-Performance Application Processors, 한국전자통신연구원 (ETRI), 2012.3
• CPU-GPU Design for Mobile Application Processors, Intel, Santa Clara, 2012.2
• GPU and Many-core Processors, 한국산업기술평가원 (KEIT), 2012.1
• GPU, OpenCL, and Mobile Computing, 한국전자통신연구원 (ETRI), 2011.11
• Low-Power 3D Graphics Processor Design, 대한전자공학회 SoC 학술대회, 2011.4
• GPU Computing Architectures, 한국전자통신연구원 (ETRI), 2011.4
• Low-Power 3D Graphics Processor using Logarithmic Arithmetic, CMOs Emerging Technologies (CMOS ET), Vancouver 2008.8

Professional Activities

[ Committee Member Services ]
• Subcommittee Chair, Digital Architectures and Systems (DAS), IEEE International Solid-state Circuits Conference (ISSCC)
• Program Committee Member, IEEE International Solid-State circuits conference (ISSCC)
• Program Committee Member, IEEE Asian Solid-State Circuits Conference (A-SSCC)
• Program Committee Member, IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips)
• Program Committee Member, International Symposium on VLSI Design, Automation & Test (VLSI-DAT)
• Program Committee Member, Asia and South Pacific Design Automation Conference (ASP-DAC)
• Program Committee Member, International SoC Design Conference (ISOCC)
• 조직위원, 한국정보과학회 컴퓨터시스템연구회 동계워크샵 2015
• 조직위원, 한국정보과학회 컴퓨터시스템 소사이어티 동계학술대회 2016, 2017, 2018
• 조직위원, 리눅스 커널 캠프 2015

[ Steering Committee Services ]
• Vice Director, SDIA (System Design Innovation & Application Research Center), KAIST
• Steering Committee Member, IDEC (IC Design Education Center), KAIST

[ Editional Services ]
• Associate Editor, IEIE Jounal of Semiconductor Technology and Science (JSTS)
• Guest Editor, IEEE Journal of Solid-State Circuits (JSSC)

[ Memberships ]
• Senior Member, Institute of Electrical and Electronics Engineers (IEEE)
• Member, IEEE Solid-state Circuits Society (SSCS) Seoul Chapter
• Member, ACM SIGARCH (Special Interest Group on Computer Architecture) Korea Chapter
• 이사, 한국차세대컴퓨팅학회
• 회원, 대한전자공학회
• 회원, 한국정보과학회
• 회원, 대한전자공학회 SoC 설계연구회
• 회원, 한국정보과학회 컴퓨터시스템 소사이어티

• Name
• Course
• E-mail

Moghaddasi Iraj
Postdoc Researcher
[email protected]

Education

University of Tehran (UT)
Ph.D. Computer Architecture

Sep 2018 | Tehran, Iran
Dissertation: Instruction-level Aging Assessment for Lifetime Improvement in Multicore Systems

Iran University of Science and Technology (IUST)
M.S. Computer Architecture

May 2003 | Tehran, Iran
Dissertation: Design and Implementation of DSP-Based Stereo Vision System

Shahid Beheshti University (SBU)
B.S. Computer Engineering

Sep 2000 | Tehran, Iran

Reserach Interest

• High Performance, Low-Power, and Reliable DNN Accelerators on Edge
• Error Resilient Embedded Systems for Safety-Critical Discipline
• Energy, Performance, Temperature, And Reliability Optimization
• Efficient VLSI and FPGA-Based Implementation of Intelligent Systems
• Computer Arithmetic and Approximate Computing
• Image Processing and Digital Signal Processing
• Software Defined Networking

Selected Publications

• I Moghaddasi, B.-G. Nam, " RNPE: An MSDF and Redundant Number System-based DNN Accelerator Engine," IEEE Access, July 2024.
• I Moghaddasi, B.-G. Nam, "Enhancing Computation-Efficiency of Deep Neural Network Processing on Edge Devices through Serial/Parallel Systolic Computing, MDPI Machine Learning and Knowledge Extraction 6 (3), 1484-1493‏, July 2024.
• I. Moghaddasi, S. Gorgin & J. Lee, "Dependable DNN Accelerator for Safety-critical Systems: A Review on the Aging Perspective " IEEE Access. 2023 July.
• I Moghaddasi, Salehi, M. E. & Kargahi, M. " Aging-aware Instruction-level Statistical Dynamic Timing Analysis for Embedded Processors. " IEEE Transaction on Very Large-Scale Integration (VLSI) Systems, Volume 28, Issue 2 (November 2019), pp 433 - 442.
• I Moghaddasi, Fouman, A., Salehi, M. E. & Kargahi, M. " Instruction-level NBTI Stress Estimation and its Application in Runtime Aging Prediction for Embedded Processors. " IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, Volume 38, Issue 8 (June 2018), pp 1427 - 1437.
• I Moghaddasi, Azarpeyvand, A. Design of Dynamic Reliability Management Framework for soft error-resistant computing cores. Paper presented at 23rd Iranian Electrical Engineering Conference (2015, Feb), Iran.
• I Moghaddasi, Fathi, M. Design and Implementation of DSP Based Vision System. Paper presented at the Second Iran International Conference on Mechatronics (2005, May), Iran.
• I Moghaddasi, Fathi, M. Edge Correspondences Based Algorithm for Receiving 3D Information with Stereo Vision. Paper presented at the Second Iran International Conference on Mechatronics (2005, May), Iran.

Teaching Experience

• Advance Computer Architecture (Postgraduate)
• Computer-Aided Design of Digital Systems (Undergraduate)
• Computer Networks (Undergraduate)
• Operating Systems (Undergraduate)
• Computer Architecture (Undergraduate)
• Data Structures and Algorithm Design (Undergraduate)
• Advanced Programming (Undergraduate)

Professional Skills

• Programming C++, C#, Python, Matlab
• HDLs Programming (VHDL and Verilog)
• Hardware Design with ASIC and FPGA
• Software/Hardware Image/Signal Processing System Design and Implementation
• Wired and Wireless Network Design, Implementation, Configuration, and Administration
• Cisco Switch, Router, and Access Server Configuration
• Data Base Design and Implementation with Microsoft SQL Server
• Video Surveillance Software Administration (Milestone, Axxon, Genetec)